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Andrew Pinski

GCC compiler engineer at qualcomm

Andrew Pinski is a highly experienced professional with a strong background in Computer Science. He holds a Bachelor of Science degree in Computer Science from the University of Cincinnati and is an alumnus of Norwood High School. Andrew has an impressive career history, having held various senior roles in well-known organizations in the technology industry. He has worked as a Sr. Staff Engineer at Qualcomm, a GCC Maintainer at the Free Software Foundation, a Principal (SW) Engineer in the Tool Chain division at Marvell Semiconductor, and a Staff Manager in the Tool Chain & Automation department at Marvell Semiconductor.

Highlights

Aug 29 · linkedin

popcount optimizations in gcc for me started when adding popcount for aarch64 to use the vector instruction, cnt. this speed up ovs by 3%. this was 2016. gcc stalled on any improvements for popcount on aarch64 (except simple vectorization of 8 bit popcount) until this year while llvm had progressed more. now gcc and llvm have similar optimizations though maybe gcc is slight ahead in some cases, using sve for an example.

Jul 29 · linkedin

GCC performance bug report(s) of the week: https://lnkd.in/exGh3zB2

Use the SVE index instruction to create fixed length SIMD constants. The idea is that the min length of SVE is 128 byte and the SVE registers overlap with the SIMD registers so using it for some constants that increment like {0,1,2,3} would increase performance because no reason to do a load from memory.

Andrew Pinski
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Location

Portland, Oregon Metropolitan Area