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Ekansh Bhatnagar

Senior ASIC Engineer

Ekansh Bhatnagar is an ASIC Design/Verification Engineer with a strong educational background and professional experience.

He pursued a Single Semester Course Work in Timing Closure in ICs at UCSC Silicon Valley Extension, a Master of Science (MS) in Electrical and Electronics Engineering from Carnegie Mellon University, and a Bachelor of Engineering (BE) in Electrical and Electronics Engineering from Thapar Institute of Engineering and Technology.

Ekansh has worked with reputable organizations such as Samsung India Software Operations, PDF Solutions, and STMicroelectronics, where he held roles as a Senior Design Engineer, Summer Intern, and Graduate Student respectively.

His experience spans across academia and industry, encompassing both hands-on engineering roles and internships, showcasing his versatile skill set in ASIC design and verification.

Ekansh Bhatnagar
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Location

San Francisco Bay Area