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Ghanshyam Gupta

Engineer II, Physical Design at Qualcomm

Ghanshyam Gupta has been active in the IC design industry since 2010, primarily focusing on Physical Design Engineering at both Block and Subsystem levels across multiple projects.

His expertise lies in Design implementation including Floorplan, Placement & Routing, and Timing closure at the Subsystem level.

He also has experience in Low power design flow based on IEEE 1801 standards and has collaborated with a Leading Foundry to establish P&R DRC correlation with DRM for advanced nodes like 10nm and 14nm.

Ghanshyam Gupta is keen on leveraging his technical skills and knowledge in a challenging work environment to benefit both his organization and personal growth.

He holds a Bachelor of Engineering (BEng) degree in Electronics and Communications Engineering from Birla Institute of Technology.

His professional journey includes roles such as Engineer II Physical Design at Qualcomm, former Member of Technical Staff at Cadence Design Systems focusing on Low Power Design Solutions and Advanced Node Foundry, and previously working as a Physical Design Engineer at Qualcomm.

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Location

San Diego, California