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Jaroslav Raszka

Embedded memory architect

Jaroslav Raszka is a seasoned professional with over two decades of industrial experience in developing innovative memories, including recent work in an advanced FinFET process.

He is known for leading pioneering efforts in the development of non-volatile memory in standard CMOS processes, which led to the first commercially available logic-based NVM IP in the industry.

Jaroslav's expertise also extends to weak inversion-based high-accuracy analog circuits and high-efficiency low-power DC/DC converters.

He pursued his education by studying Ing, Microelectronics at Brno University of Technology.

Throughout his career, Jaroslav has held significant roles such as Design Engineer at Apple, Principal IP Engineer at eSilicon, Senior Principal Design Engineer at Alien Technology, Distinguished Member of Technical Staff at Virage Logic, Chief Design Engineer at SAMES, and various Design Engineer positions in renowned organizations like TEMIC, ASICentrum, and VUST A. S. Popova.

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Location

San Francisco Bay Area