Sign In

Jaydeep Rangani

Memory Design Engineer at Intel Corporation

Jaydeep Rangani is a Memory Design Engineer at Intel Corporation, based in Santa Clara, California. He specializes in designing dynamic logic memories, utilizing the latest techniques, including domino logic. His educational background includes studies at Dhirubhai Ambani Institute of Information and Communication Technology (DAIICT) in India. Prior to his role at Intel, he worked in research and development (R&D) in the technology sector.12

Highlights

Oct 23 · linkedin

May your life shine like light, May your happiness be like sparkles, May your sorrows be bursted, Let your light shine, A VERY HAPPY DEEPAVALI TO ALL

Related Questions

What are Jaydeep Rangani's main responsibilities at Intel?
What projects has Jaydeep Rangani worked on at Intel?
How long has Jaydeep Rangani been with Intel?
What is Jaydeep Rangani's educational background?
What techniques does Jaydeep Rangani use in memory design?
Jaydeep Rangani
Jaydeep Rangani, photo 1
Jaydeep Rangani, photo 2
Add to my network

Location

Bengaluru, Karnataka, India