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Jules Bassale

Design Verification Engineer

Jules Bassale is an experienced ASIC/FPGA Verification Engineer currently working at Apple as a Design Verification Engineer.12 He is based in Cupertino, California, and has a strong passion for continuous learning and staying at the forefront of innovation in his field.

Education and Background

Jules holds a Bachelor of Science degree, though the specific field is not mentioned in the available information.2 He also obtained a Master's degree in Statistics from Portland State University between 2008 and 2010.34

Professional Experience

As a Design Verification Engineer at Apple, Jules likely plays a crucial role in ensuring the quality and functionality of Apple's hardware designs. His expertise in ASIC (Application-Specific Integrated Circuit) and FPGA (Field-Programmable Gate Array) verification suggests that he works on complex digital systems and chip designs.1

Skills and Interests

Jules is described as having an avid appetite for learning, which aligns well with the fast-paced and innovative nature of the tech industry.1 His background in statistics, combined with his experience in hardware verification, indicates a strong analytical skill set that is valuable in his current role.

LinkedIn Profile

Jules Bassale's LinkedIn profile can be found under the username jules-bassale-ab7963176. This profile likely contains more detailed information about his professional experience, skills, and accomplishments.1

Highlights

Oct 17 · jobs.apple.com
Design Verification Engineer - Careers at Apple
Oct 17 · jobs.apple.com
Design Verification Engineer - Careers at Apple
Feb 10 · radaris.com
Jules Bassale - Age, Phone Number, Address, Contact ... - Radaris

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Location

Portland, Oregon Metropolitan Area