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Michael L. Lewis

Senior Hardware Engineer - Azure Silicon Engineering at Microsoft

Michael L. Lewis is an experienced professional with a robust background in digital front-end semiconductor design specializing in micro-architecture, RTL implementation, verification, and synthesis.

His expertise also includes areas like static timing analysis, design-for-test strategies, post-SI bring-up, analysis, and debug, along with significant exposure to cryogenic chip testing and digital electronic test equipment.

On the back-end side, Michael has valuable experience in floorplanning, automated place-and-route, LVS (layout vs. schematic), and DRC (design rule checking).

He is well-versed in technologies such as CMOS and superconducting logic, particularly single flux quantum.

Michael pursued his higher education at UC Santa Barbara, where he studied MS in Computer Engineering, and at California State University, Fresno, where he completed his BSEE in Electrical Engineering.

Throughout his career, Michael L. Lewis has held key roles at top-tier organizations, including Senior Hardware Engineer positions at Azure Silicon Engineering Solutions and Cryogenic Computing teams within Microsoft.

Prior to his tenure at Microsoft, he served as a Senior Principal Design Engineer at Cypress Semiconductor and started his career as a Digital Design Engineer at TRW.

Highlights

Nov 15 · linkedin

At the annual Ignite conference, Microsoft will announce a years-long chip effort to improve the capability of Azure to serve general purpose and AI workloads.

Mar 7 · linkedin

Thrilled to see Microsoft recognized by Fast Company as the 6th most innovative company in the world for "centering accessibility in its products". Doubly delighted, as technology partner, OpenAI, tops this list 👏 #innovation #msftadvocate

Michael L. Lewis
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Location

Greater Seattle Area