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Mitesh Agrawal

Senior Staff Engineer at Samsung Semiconductor India R&D Centre

Mitesh Agrawal is an accomplished professional with over 10 years of experience in the digital development cycle, specializing in digital design, synthesis, and STA.

He has served as a digital technical lead for silicon-proven AMS IPs, catering to top-tier customers in the mobile industry and working with cutting-edge technologies.

His expertise spans across complete digital development, covering architecture, RTL, synthesis, timing closure, and the development of various AMS IPs like ADC, PLL, and VT Sensors.

A versatile technical leader in the semiconductors sector, Mitesh excels in AMS IP and SoC developments, overseeing the Spec to GDS flow process, product spec definition, analog-digital partition, RTL design, ASIC flow, silicon validation support, project execution, and customer assistance.

With a background as a logic design engineer, he has handled logic design proposals, RTL coding, simulation, synthesis, timing analysis, logic equivalence checking, ECO, DFT structures design, and on-site post-silicon system bring-up for critical logic in IBM Processors.

Mitesh is known for building strong customer relationships with top-tier and demanding clients, understanding market requirements thoroughly to define solutions and identify new opportunities.

He has actively mentored and led teams in various design aspects of processors, demonstrating exceptional analytical, interpersonal, and team management skills. He is a self-motivated individual and a quick learner.

Additionally, Mitesh is an author of 4 patents and has contributed to 3 publications.

He holds a Bachelor of Engineering (BE) degree in Electronics and Telecommunication from Pune Institute of Computer Technology.

Mitesh Agrawal has held key positions in renowned organizations such as Senior Staff Engineer at Samsung Semiconductor India R&D Centre, Design Engineering Manager at Cadence Design Systems, AMS RTL Lead Engineer at Cadence Design Systems, and various roles at IBM STG including Senior Staff Design Engineer, Staff Design Engineer, Senior Design Engineer, and Logic Design Engineer.

Mitesh Agrawal
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Location

India