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Surendra Anubolu

Sr Technical Director, Distinguished Engineer at Broadcom Limited

Professional Background

Surendra Anubolu is an esteemed networking switch silicon architect with a remarkable career spanning over two decades in the design and development of cutting-edge networking and storage application-specific integrated circuits (ASICs). He has carved a niche for himself in the industry by specializing in creating innovative solutions tailored for cloud-scale storage and artificial intelligence workloads, establishing him as a leader at the forefront of networking technology.

Throughout his extensive career, Surendra has showcased his technical prowess in the field of networking and ASIC development. His expertise extends beyond mere architectural design to include system-level optimizations that enhance cost efficiency, power consumption, and overall performance metrics. As a visionary in his field, he has a keen ability to identify market gaps and translate these insights into actionable product ideas, navigating them from conception through to successful production.

Surendra's career has seen him hold prominent positions at industry giants such as Broadcom Limited and Cisco Systems. Throughout his time at these organizations, he has been a significant force, contributing to the development of revolutionary technologies in networking. Some of his notable achievements include delivering the industry's first flexible switch ASIC architecture and architecting switch wireless integration with protocols such as CAPWAP, highlighting his extensive knowledge and understanding of the market dynamics.

Education and Achievements

Surendra Anubolu laid a robust educational foundation with his Master of Science (MS) from the prestigious Indian Institute of Science, coupled with a Bachelor of Science in Electronics and Communications (BSEE) from the National Institute of Technology in Warangal. His academic background has thoroughly equipped him with the essential skills and knowledge required to excel in his field, allowing him to approach technological challenges with a sophisticated understanding.

In his pursuit of excellence, Surendra has delivered impactful presentations at multiple conferences focusing on data center networking, with a recent emphasis on energy-efficient networks designed for AI training. His thought leadership in these discussions has helped to shape industry trends and drive conversations surrounding advancements in networking technologies.

Moreover, Surendra boasts a portfolio rich in intellectual property, holding numerous patents in the networking domain at a data center scale. These patents reflect his commitment to innovation and his continuous drive for advancement within the industry.

Achievements

Surendra's career includes several notable achievements, illustrating his significant contributions to the field of networking and ASIC development:

  1. Industry First Architecture: He successfully delivered an industry-first flexible switch ASIC architecture, showcasing his ability to innovate within complex technological environments.

  2. Energy Efficiency Advocacy: Surendra has passionately presented on energy-efficient networking solutions for AI training at key conferences, demonstrating his commitment to sustainability in technology.

  3. Wireless Integration: He architected the switch wireless integration leveraging CAPWAP, crypto, and mobility, significantly enhancing the capabilities of networking technologies.

  4. Advanced Node Transition: His work with cloud-scale switch silicon architecture has extended to advanced nodes, including 16nm, 7nm, and 5nm, thus integrating the latest technology into practical applications.

  5. Stronger Customer Relationships: Surendra has cultivated robust relationships with customers, ensuring that his designs not only meet but exceed market expectations.

  6. Faster Execution Methodologies: He has driven the implementation of methodologies leading to faster execution and improved processes within engineering teams.

  7. Co-verification Leadership: His leadership in software and ASIC co-verification utilizing C-models and hardware FPGA emulation has led to streamlined development processes and enhanced product reliability.

tags':['Networking Architect','Silicon Architect','ASIC Development','Cloud-Scale Solutions','AI Workloads','Data Center Networking','Power Optimization','Performance Metrics','System Architecture','Machine Learning','Networking Solutions','Internet Protocols','Security Compliance','Advanced Node Technology','Customer Relationship Management','Conference Speaker','Patents in Networking'],

questions':['How did Surendra Anubolu develop his expertise in designing networking solutions for cloud-scale storage?','What innovations has Surendra Anubolu brought to the area of ASIC development during his career?','How has Surendra Anubolu contributed to advancements in energy-efficient networks for AI training?','What key factors have influenced Surendra Anub

Highlights

Aug 5 · linkedin

Here is a gold mine for the builders of ai infrastructure. This Sigcomm 2024 paper on RDMA over Ethernet for Distributed AI Training at Meta by Adi Gangidi Rui Miao Rohit Puri Mikel Jimenez and the ai network infra team at Meta gives rare insight into building and operating fabric for AI at scale. Many of us are constrained by the availability of GPU at scale to run these experiments. I really appreciate AI network infra team at Meta in their dedication to help the community at large. Thank you!

Surendra Anubolu
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Location

Fremont, California, United States