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Chandan J

Sr design verification engineer at AMD

Chandan T J is a determined individual with a career objective geared towards the semiconductor industry, aiming to contribute innovative technological designs in a global setting.

With experience in RTL Verification using HVL, Simulation, Regression with various EDA Tools, and proficiency in scripting languages like Shell Scripting and TCL, Chandan showcases a diverse skill set.

His specialties lie in Verification using System Verilog with UVM1.1d methodology, underpinning his expertise in this specific area of semiconductor design.

Having worked on projects such as developing layered architecture for USB3.0 VIP, functional verification of USB controllers using UVM and System Verilog, logic synthesis of memory controllers, and PLL design for RF applications, Chandan has a solid project portfolio.

Chandan's educational background includes a Master of Technology (M.Tech.) in VLSI Design and Embedded Systems, as well as a Bachelor of Engineering (BE) in Electrical, Electronics, and Communications Engineering, both achieved with First Class with Distinction.

He has held positions such as Sr Design Verification Engineer at AMD, Verification Engineer at Mobiveil Inc., Associate Verification Engineer at Tech Vulcan Solutions, along with roles at Indian Space Research Organisation.

His professional journey showcases a commitment to enhancing the semiconductor industry through his skills and expertise.

Chandan J
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Location

Bangalore Urban, Karnataka, India